Project information

• Tech Stacks: Verilog, DE1-SOC Board
• Category: Hardware
• Course: SFWRENG 2DA4
• Repository URL: Source Code

This project implements a Moore Finite State Machine (FSM) combination lock in Verilog specifically designed for the DE1-SOC Board. The combination lock operates based on a predefined 4-bit sequence of inputs, with added security features such as an alarm after two incorrect tries and the ability to change the combination.